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Dual Port SRAM Compiler
TSMC 0.13µ technology
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All designs are created using standard layout logic. No layout cheats are used in any of our designs making Valence memories more manufacturable with a higher yield.

Valence, Inc was founded in 1993 specializing in embedded memory design. Our key personnel have over 33 years experience in leading-edge memories. We offer memory compilers, custom memories and design services.

CrossLink™ - patented technology
Valence has developed an innovative memory design that can substantially reduce the area of a memory. The reduced area is achieved through design techniques without compromising the robustness of the memory cell. By applying our patented CrossLink design to a traditional Dual Port SRAM we are able to reduce our memory cell size by 32%.

In addition to reducing your cost, CrossLink reduces array power, reduces sensing noise, improves performance and allows for a more robust design.

Glider - patented technology

Reduces array power, reduces sensing noise, improves performance and allows for a more robust design.




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